SIMD processors are best suited to performing the same operation on multiple elements of data simultaneously. Typically, parallel processing portions of a single arithmetic logic unit (often viewed as individual parallel ALUs) operate on portions of operands simultaneously.
Specialized SIMD processors are particularly well suited for operating on data representing video. Processing of video, in turn, requires numerous specialized calculations.
For example, it is often desirable or required to locate the minimum or maximum value in a one or two dimensional array. This is, for example, useful in many motion estimation steps of video compression or noise reduction algorithms. A two dimensional array may represent an array of sums of absolute differences between pixels of a current two dimensional pixel block, and numerous candidate reference blocks. A further associated two dimensional array may represent an array of motion vectors, one associated with each pixel block. Locating the minimum or maximum entries of the array so formed, facilitates locating pixel blocks of greatest similarity or difference in two images, and associated motion vectors. Known media processors and digital signal processors typically locate maximum and minimum entries using a conventional minimum or maximum finding algorithm. Such algorithms typically require a series of conditional branches or conditional assignment instructions. As such, they require multiple processor clock cycles.
Clearly, then a processor capable of easily determining maximum or minimum entries within an array is desirable.